In the fabrication of integrated circuits, various conductive layers are used. For example, during the formation of semiconductor devices, such as dynamic random access memories (DRAMs), conductive materials are used in the formation of storage cell capacitors and also may be used in interconnection structures, e.g., conductive layers of contact holes, vias, etc.
As memory devices become more dense, it is necessary to decrease the size of circuit components forming such devices. One way to retain storage capacity of storage cell capacitors of the memory devices and at the same time decrease the memory device size is to increase the dielectric constant of the dielectric layer of the storage cell capacitor. Therefore, high dielectric constant materials are used in such applications interposed between two electrodes. One or more layers of various conductive materials may be used as the electrode material.
Further, to the increase the capacitance for a storage cell capacitor of a memory device without increasing the occupation area of the storage cell capacitor, various techniques have been used to increase the surface area of the lower electrode of the capacitor. For example, hemispherical grains (HSG) have been used to enhance such surface area of the lower electrode of a capacitor of a memory device.
In one illustrative HSG technique, an HSG silicon surface is used as an underlayer for a metal layer to form a lower electrode having an increased surface area. For example, such a coextensive conductive layer formed over the hemispherical grain silicon surface may be formed of titanium nitride.
However, in many cases, the use of HSG to enhance surface area of the lower electrode is problematic. For example, when an HSG silicon surface is used as an underlayer for a metal in a container capacitor (e.g., a container capacitor such as described in U.S. Pat. No. 5,270,241 to Dennison, et al., entitled “Optimized Container Stack Capacitor DRAM Cell Utilizing Sacrificial Oxide Deposition and Chemical Mechanical Polishing,” issued Dec. 14, 1993) there is a possibility of forming silicon dioxide between the HSG silicon surface and the metal layer of which the electrode is formed when the dielectric layer is being formed due to the diffusion of oxygen through the metal layer. Further, there is the possibility of silicon dioxide formation between the metal layer and the dielectric being formed due to the diffusion of silicon through the metal layer. Such silicon dioxide formation is likely due to the oxygen anneal required for formation of high dielectric constant materials, e.g., Ta2O5 or BaSrTiO3, over the lower electrode.
However, reliable electrode connections are necessary. Formation of silicon dioxide as described above decreases the reliability of the electrode connection. Further, such silicon dioxide formation may result in a decreased series capacitance, thus degrading the storage capacity of the cell capacitor.
To prevent the diffusion of oxygen to the HSG silicon surface, or the diffusion of silicon through the metal layer, the use of a diffusion barrier, such as titanium nitride, may be used between the HSG silicon surface to form the lower electrode. The use of a diffusion barrier over the HSG silicon surface, however, also has problems associated therewith. For example, the container size of a container capacitor is relatively small. With use of multiple layers, such as HSG silicon surface, a diffusion barrier, and then a lower metal electrode layer, a container having an undesirably large size may be required.
Further, formation of a diffusion barrier layer over an increased surface area of an HSG silicon surface, and thereafter a lower metal electrode layer thereon, will decrease the effectiveness of the HSG layer to increase the surface area of the lower electrode. In other words, the surface area of the HSG silicon surface is decreased by application of the diffusion barrier layer, and then further decreased by the application of the lower electrode layer. In such a manner, the effectiveness of increasing the lower electrode surface area with use of HSG is diminished.
Further, grain size of an HSG silicon surface is somewhat limited. For example, such grain size is typically less than 200 Å in nominal diameter. As such, the increase in surface area provided through use of HSG is limited accordingly.
Generally, various metals and metallic compounds, for example, metals such as ruthenium and platinum, and conductive metal oxides, such as ruthenium oxide, have been proposed as the electrodes for at least one of the layers of an electrode stack for use with high dielectric constant materials. Ruthenium oxide and ruthenium electrodes have been employed as electrode materials because of the ability to easily etch such materials. For example, the article entitled, “(Ba,Sr)TiO3 Films Prepared by Liquid Source Chemical Vapor Deposition on Ru Electrodes,” by Kawahara et al., Jpn. J. Appl. Phys., Vol. 35 (1996), Part 1, No. 9B (September 1996), pp. 4880–4885, describes the use of ruthenium and ruthenium oxide for forming electrodes in conjunction with high dielectric constant materials. As described therein, surface roughening of such materials is believed to attribute to degradation of the structures being formed.
Further, as described therein, ruthenium and ruthenium oxide materials were deposited by physical vapor deposition (PVD) processing, e.g., reactive RF sputtering processes. Many storage cell capacitors are fabricated which include electrode layers that are formed of a conductive material within a small high aspect ratio opening. Typically, sputtering does not provide a sufficiently conformal layer adequate for formation of an electrode layer within such a small high aspect ratio opening.